Design of Track-and-hold Amplifier and Mulitiplying Digital to Analog Converter

This chapter presents the design of the track-and-hold and multiplying digital-to-analog converter functional blocks. They are realized by Switched Capacitors (SC) circuits. Typical SC circuit stage consists of sampling capacitors and Metal Oxide Semiconductor (MOS) switches which turn on and off at the clock rate to store the input signal (charge) on the sampling capacitors and subsequently transfer that charge to the next stage. As the MOS switches are turned on and off, charge is injected from the gate to the drain and the source of these switches. The turn-on resistance of a MOS switch is input signal dependent and creates nonlinear distortion. The charge injection and signal dependent on-resistance of the MOS switches introduce nonlinearity errors in the switched capacitor circuits. Capacitor mismatch is another error source that significantly affects ADC performance. A detailed investigation on circuit nonidealities degrading the performance of the switched capacitor ADC is carried out. Exploration of the circuit techniques for reducing the nonlinearities is addressed in this chapter.